Chaotic image encryption using hopfield and hindmarsh–rose neurons implemented on FPGA

Chaotic systems implemented by artificial neural networks are good candidates for data encryption. In this manner, this paper introduces the cryptographic application of the Hopfield and the Hindmarsh–Rose neurons. The contribution is focused on finding suitable coefficient values of the neurons to generate robust random binary sequences that can be used in image encryption. This task is performed by evaluating the bifurcation diagrams from which one chooses appropriate coefficient values of the mathematical models that produce high positive Lyapunov exponent and Kaplan–Yorke dimension values, which are computed using TISEAN. The randomness of both the Hopfield and the Hindmarsh–Rose neurons is evaluated from chaotic time series data by performing National Institute of Standard and Technology (NIST) tests. The implementation of both neurons is done using field-programmable gate arrays whose architectures are used to develop an encryption system for RGB images. The success of the encryption system is confirmed by performing correlation, histogram, variance, entropy, and Number of Pixel Change Rate (NPCR) tests

Behavioral Modeling of Mixed-Mode Integrated Circuits

Open Access.-- et al.This work is partially supported by CONACyT through the grant for the sabbatical stay of the first author at University of California at Riverside, during 2009-2010. The authors acknowledge the support from UC-MEXUS-CONACYT collaboration grant CN-09-310; by Promep México under the project UATLX-PTC-088, and by Consejeria de Innovacion Ciencia y Empresa, Junta de Andalucia, Spain, under the project number TIC-2532. The third author thanks the support of the JAE-Doc program of CSIC, co-funded by FSE.Peer Reviewe

IMPLEMENTACION ANALOGICA DE UN OSCILADOR CAOTICO ESFERICO EN MULTISIM Y DEMOSTRACIÓN DE CASOS (ANALOGICAL IMPLEMENTATION OF A SPHERICAL CHAOTIC OSCILLATOR IN MULTISIM AND DEMONSTRATION OF CASES)

ResumenEste artículo presenta el desarrollo de un sistema caótico de cuatro alas, primeramente es simulado en el software de Matlab, después se proceden a calcular los parámetros de los componentes analógicos que representarán al sistema en un circuito electrónico que es simulado en Multisim. Serán otros componentes osciladores que generarán ondas sinusoidales para obtener la representación de elipses con distinta excentricidad. Posteriormente las señales son sumadas para obtener una trayectoria elíptica con interferencia caótica en donde son aplicados 2 casos diferenciados del sistema. Finalmente, en este trabajo se estableció una nueva metodología para representar sistemas caóticos esféricos analógicamente, cuyas interacción con sistemas orbitales permitirá abrir un nuevo campo en áreas de telecomunicaciones y la encriptación de la información.Palabras Claves: Caos, esférico, interferencia, matlab, multisim. AbstractThis article presents the development of a four-wings chaotic system. First of all it is simulated in the Matlab software and the mathematical modeling is obtained, after we proceed to calculate the parameters of the analog components that will represent the system in a circuit modeled in Multisim. Other oscillator components will generate sine waves obtaining the representation of ellipses with different eccentricity. Later the signals will be mixed to obtain an elliptical trajectory with chaotic interference where 2 differentiated cases of the system are applied. Finally, in this work a new methodology was established to represent spherical chaotic systems analogically, whose interaction with orbital systems will allow to open a new field in areas of telecommunications and information encryption. Keywords: Chaos, interference, matlab, multisim, spherical

Sizing CMOS Amplifiers by PSO and MOL to Improve DC Operating Point Conditions

The sizes of the metal-oxide-semiconductor (MOS) transistors in an operational amplifier must guarantee strong direct current operating point (DCOP) conditions. This paper shows the usefulness of two population-based optimization algorithms to size transistors, namely—particle swarm optimization (PSO) and many optimizing liaisons (MOL). Both optimization algorithms link the circuit simulator SPICE to measure electrical characteristics. However, SPICE provides an output-file indicating that a transistor is in strong inversion but the DCOP can be in the limit, and it can switch to a different condition. In this manner, we highlight the application of PSO and MOL to size operational transconductance amplifiers (OTAs), which DCOP conditions are improved by the introduction of a procedure that handles constraints to ensure that the transistors are in the appropriate DCOP. The Miller and RFC-OTA are the cases of study, and their sizing is performed using UMC 180 nm CMOS technology. In both OTAs, the objective function is the maximization of the gain-bandwidth product under the main constraint of guaranteeing DCOPs to improve two figures of merit and to provide robustness to Monte Carlo simulations and PVT variations

Integrated Circuits for Analog Signal Processing

  This book presents theory, design methods and novel applications for integrated circuits for analog signal processing.  The discussion covers a wide variety of active devices, active elements and amplifiers, working in voltage mode, current mode and mixed mode.  This includes voltage operational amplifiers, current operational amplifiers, operational transconductance amplifiers, operational transresistance amplifiers, current conveyors, current differencing transconductance amplifiers, etc.  Design methods and challenges posed by nanometer technology are discussed and applications described, including signal amplification, filtering, data acquisition systems such as neural recording, sensor conditioning such as biomedical implants, actuator conditioning, noise generators, oscillators, mixers, etc.   Presents analysis and synthesis methods to generate all circuit topologies from which the designer can select the best one for the desired application; Includes design guidelines for active devices/elements with low voltage and low power constraints; Offers guidelines for selecting the right active devices/elements in the design of linear and nonlinear circuits; Discusses optimization of the active devices/elements for process and manufacturing issues of nanometer technology